177 lines
6.6 KiB
Plaintext
177 lines
6.6 KiB
Plaintext
/*
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* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <ATen/cuda/EmptyTensor.h>
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#include <cuda_fp16.h>
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#include <cstddef>
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#include <cstdint>
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#include <functional>
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#include <type_traits>
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#include <vector>
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#include "flashinfer/gemm/cutlass_gemm_configs.h"
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#include "flashinfer/gemm/fp8_gemm_cutlass.h"
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#include "flashinfer/gemm/fp8_gemm_cutlass_template.h"
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#include "pytorch_extension_utils.h"
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using flashinfer::gemm::ClusterShape;
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using flashinfer::gemm::CutlassFp8GemmRunner;
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using flashinfer::gemm::CutlassFp8GemmRunnerInterface;
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using flashinfer::gemm::CutlassGemmConfig;
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using flashinfer::gemm::CutlassTileConfigSM100;
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using flashinfer::gemm::EpilogueScheduleType;
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using flashinfer::gemm::MainloopScheduleType;
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namespace flashinfer {
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namespace gemm {
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template class CutlassFp8GemmRunner<__nv_bfloat16>;
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template class CutlassFp8GemmRunner<half>;
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} // namespace gemm
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} // namespace flashinfer
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namespace torch_ext {
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namespace {
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CutlassGemmConfig getFp8GemmConfig(int64_t m, int64_t n, int64_t k, int64_t tactic) {
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auto getCutlassFp8GemmConfigs = []() {
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CutlassFp8GemmRunner<__nv_bfloat16> gemmRunner;
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return gemmRunner.getConfigs();
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};
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static std::vector<CutlassGemmConfig> globalConfigs = getCutlassFp8GemmConfigs();
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TORCH_CHECK(tactic >= 0 && tactic < globalConfigs.size(), "tactic must be between 0 and ",
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globalConfigs.size());
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return globalConfigs[tactic];
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}
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template <typename T>
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void runGemm(at::Tensor& out, at::Tensor const& mat1, at::Tensor const& mat2,
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at::Tensor const& scale_a, at::Tensor const& scale_b, int64_t m, int64_t n, int64_t k,
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int64_t b, CutlassGemmConfig const& gemmConfig, at::Tensor workspace_buffer) {
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CutlassFp8GemmRunner<T> gemmRunner;
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int64_t const required_workspace_size = gemmRunner.getWorkspaceSize(m, n, k);
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int64_t const provided_workspace_size =
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workspace_buffer.numel() * workspace_buffer.element_size();
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auto runKernel = [&](void* workspace) {
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gemmRunner.gemm(reinterpret_cast<__nv_fp8_e4m3 const*>(mat1.const_data_ptr()),
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reinterpret_cast<__nv_fp8_e4m3 const*>(mat2.const_data_ptr()),
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reinterpret_cast<float const*>(scale_a.const_data_ptr()),
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reinterpret_cast<float const*>(scale_b.const_data_ptr()), out.data_ptr(), m, n,
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k, b, gemmConfig, reinterpret_cast<char*>(workspace), required_workspace_size,
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at::cuda::getCurrentCUDAStream(mat1.get_device()));
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};
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if (provided_workspace_size < required_workspace_size) {
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at::Tensor new_workspace = at::detail::empty_cuda(
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{required_workspace_size}, at::ScalarType::Char, mat1.device(), std::nullopt);
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runKernel(new_workspace.data_ptr());
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} else {
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runKernel(workspace_buffer.data_ptr());
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}
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}
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at::Tensor fp8_bmm_impl(at::Tensor const& mat1, at::Tensor const& mat2, at::Tensor const& scale_a,
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at::Tensor const& scale_b, at::Tensor out, at::Tensor workspace_buffer,
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int64_t tactic) {
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CHECK_INPUT(mat1);
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CHECK_INPUT(mat2);
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CHECK_INPUT(scale_a);
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CHECK_INPUT(scale_b);
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int mat2_k_scale = 1;
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int64_t m, n, k, b;
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if (mat1.dim() == 2) {
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TORCH_CHECK(mat2.dim() == 2, "mat2 must be a matrix");
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TORCH_CHECK(mat1.sizes()[1] == mat2.sizes()[1] * mat2_k_scale,
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"mat1 and mat2 shapes cannot be multiplied (", mat1.sizes()[0], "x",
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mat1.sizes()[1], " and ", mat2.sizes()[0], "x", mat2.sizes()[1], ")");
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m = mat1.sizes()[0];
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n = mat2.sizes()[0];
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k = mat2.sizes()[1];
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b = 1;
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} else if (mat1.dim() == 3) {
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TORCH_CHECK(mat2.dim() == 3, "mat2 must be a batch of matrices");
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TORCH_CHECK(mat1.sizes()[0] == mat2.sizes()[0], "mat1 and mat2 must have the same batch size (",
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mat1.sizes()[0], " and ", mat2.sizes()[0], ")");
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TORCH_CHECK(mat1.sizes()[2] == mat2.sizes()[2] * mat2_k_scale,
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"mat1 and mat2 shapes cannot be multiplied (", mat1.sizes()[1], "x",
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mat1.sizes()[2], " and ", mat2.sizes()[1], "x", mat2.sizes()[2], ")");
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m = mat1.sizes()[1];
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n = mat2.sizes()[1];
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k = mat2.sizes()[2];
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b = mat1.sizes()[0];
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} else {
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C10_THROW_ERROR(NotImplementedError, "mat1 must be a matrix or a batch of matrices");
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}
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// No heuristic for now, we rely on the autotuner to select the best tactic.
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if (tactic == -1) {
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tactic = 0;
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}
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auto config = getFp8GemmConfig(m, n, k, tactic);
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// Validate out dimensions
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std::vector<int64_t> out_shape =
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mat1.dim() == 2 ? std::vector<int64_t>{m, n} : std::vector<int64_t>{b, m, n};
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TORCH_CHECK(out.dim() == out_shape.size(), "out must have ", out_shape.size(),
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" dimensions, but got ", out.dim());
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for (int i = 0; i < out_shape.size(); ++i) {
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TORCH_CHECK(out.sizes()[i] == out_shape[i], "out shape mismatch at dimension ", i,
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": expected ", out_shape[i], ", got ", out.sizes()[i]);
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}
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switch (out.scalar_type()) {
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case at::ScalarType::Half:
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runGemm<half>(out, mat1, mat2, scale_a, scale_b, m, n, k, b, config, workspace_buffer);
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break;
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case at::ScalarType::BFloat16:
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runGemm<__nv_bfloat16>(out, mat1, mat2, scale_a, scale_b, m, n, k, b, config,
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workspace_buffer);
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break;
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default:
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TORCH_CHECK(false, "out_dtype must be one of fp16/bf16.");
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}
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return out;
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}
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} // namespace
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at::Tensor fp8_gemm(at::Tensor const& mat1, at::Tensor const& mat2, at::Tensor const& scale_a,
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at::Tensor const& scale_b, at::Tensor out, at::Tensor workspace_buffer,
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int64_t tactic) {
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return fp8_bmm_impl(mat1, mat2, scale_a, scale_b, out, workspace_buffer, tactic);
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}
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int64_t fp8_gemm_tactic_num() {
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auto getCutlassConfigs = []() {
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CutlassFp8GemmRunner<__nv_bfloat16> gemmRunner;
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return gemmRunner.getConfigs();
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};
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static int64_t totalTactics = getCutlassConfigs().size();
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return totalTactics;
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}
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} // namespace torch_ext
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TORCH_LIBRARY_FRAGMENT(TORCH_EXTENSION_NAME, m) {
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m.def("fp8_gemm", &torch_ext::fp8_gemm);
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m.def("fp8_gemm_tactic_num", &torch_ext::fp8_gemm_tactic_num);
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}
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