218 lines
10 KiB
Plaintext
218 lines
10 KiB
Plaintext
/*
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* Copyright (c) 2023 by FlashInfer team.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <flashinfer/attention/decode.cuh>
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#include <flashinfer/attention/scheduler.cuh>
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#include <flashinfer/pos_enc.cuh>
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#include <flashinfer/utils.cuh>
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#include <optional>
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#include "batch_decode_config.inc"
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#include "tvm_binding_utils.h"
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namespace flashinfer {
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template <uint32_t HEAD_DIM, PosEncodingMode POS_ENCODING_MODE, typename AttentionVariant,
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typename Params>
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cudaError_t BatchDecodeWithPagedKVCacheDispatched(Params params, typename Params::DTypeO* tmp_v,
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float* tmp_s, bool enable_pdl,
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cudaStream_t stream);
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} // namespace flashinfer
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using namespace flashinfer;
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IntTuple BatchDecodeWithPagedKVCachePlan(
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DLTensor* float_workspace_buffer, DLTensor* int_workspace_buffer,
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DLTensor* page_locked_int_workspace_buffer, DLTensor* indptr, int64_t batch_size,
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int64_t num_qo_heads, int64_t num_kv_heads, int64_t page_size, bool enable_cuda_graph,
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int64_t pos_encoding_mode_code, int64_t window_left, int64_t head_dim_qk, int64_t head_dim_vo,
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DataType q_scalar_type, DataType kv_scalar_type, TVMStreamHandle cuda_stream) {
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size_t float_workspace_size_in_bytes =
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float_workspace_buffer->shape[0] * DataType(float_workspace_buffer->dtype).bytes();
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size_t int_workspace_size_in_bytes =
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int_workspace_buffer->shape[0] * DataType(int_workspace_buffer->dtype).bytes();
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DecodePlanInfo plan_info;
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CHECK_EQ(head_dim_qk, head_dim_vo)
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<< "CUDA cores template only supports equal head dim for QK and VO, please use tensor "
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"cores template for different head dim";
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const PosEncodingMode pos_encoding_mode = static_cast<PosEncodingMode>(pos_encoding_mode_code);
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cudaStream_t stream = static_cast<cudaStream_t>(cuda_stream);
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DISPATCH_context(
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DTypeQ, DTypeKV, DTypeO, IdType, HEAD_DIM_QK, HEAD_DIM_VO, POS_ENCODING_MODE,
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USE_SLIDING_WINDOW, USE_LOGITS_SOFT_CAP, AttentionVariant, Params, [&] {
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DISPATCH_GQA_GROUP_SIZE(num_qo_heads / num_kv_heads, GROUP_SIZE, {
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auto work_estimation_func = BatchDecodeWithPagedKVCacheWorkEstimationDispatched<
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GROUP_SIZE, HEAD_DIM_QK, POS_ENCODING_MODE, AttentionVariant, Params>;
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cudaError_t status = DecodePlan<HEAD_DIM_QK, POS_ENCODING_MODE, AttentionVariant, Params>(
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static_cast<char*>(float_workspace_buffer->data) +
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float_workspace_buffer->byte_offset,
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float_workspace_size_in_bytes,
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static_cast<char*>(int_workspace_buffer->data) + int_workspace_buffer->byte_offset,
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static_cast<char*>(page_locked_int_workspace_buffer->data) +
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page_locked_int_workspace_buffer->byte_offset,
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int_workspace_size_in_bytes, plan_info,
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static_cast<IdType*>(indptr->data) + indptr->byte_offset / sizeof(IdType), batch_size,
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num_qo_heads, page_size, enable_cuda_graph,
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/*stream=*/stream, work_estimation_func);
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CHECK(status == cudaSuccess)
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<< "BatchDecodeWithPagedKVCache failed with error " << cudaGetErrorString(status);
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return true;
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});
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});
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std::vector<int64_t> plan_info_vec = plan_info.ToVector();
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return IntTuple{plan_info_vec.begin(), plan_info_vec.end()};
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}
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void BatchDecodeWithPagedKVCacheRun(
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DLTensor* float_workspace_buffer, DLTensor* int_workspace_buffer, IntTuple plan_info_vec,
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DLTensor* q, DLTensor* paged_kv_cache, DLTensor* paged_kv_indptr, DLTensor* paged_kv_indices,
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DLTensor* paged_kv_last_page_len, DLTensor* q_rope_offset, DLTensor* paged_kv_rope_pos_offset,
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DLTensor* o, DLTensor* lse, int64_t pos_encoding_mode_code, int64_t kv_layout_code,
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int64_t window_left ADDITIONAL_FUNC_PARAMS, TVMStreamHandle cuda_stream) {
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DecodePlanInfo plan_info;
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std::vector<int64_t> plan_info_vec_(plan_info_vec->data,
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plan_info_vec->data + plan_info_vec->size);
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plan_info.FromVector(plan_info_vec_);
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QKVLayout kv_layout = static_cast<QKVLayout>(kv_layout_code);
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int64_t batch_size = q->shape[0];
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int64_t num_qo_heads = q->shape[1];
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int64_t num_kv_heads, page_size;
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if (kv_layout == QKVLayout::kHND) {
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num_kv_heads = paged_kv_cache->shape[2];
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page_size = paged_kv_cache->shape[3];
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} else {
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page_size = paged_kv_cache->shape[2];
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num_kv_heads = paged_kv_cache->shape[3];
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}
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uint32_t head_dim_qk = q->shape[2];
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uint32_t head_dim_vo = paged_kv_cache->shape[4];
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CHECK_EQ(head_dim_qk, head_dim_vo)
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<< "CUDA cores template only supports equal head dim for QK and VO, please use tensor "
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"cores template for different head dim";
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CHECK(lse->shape[0] == q->shape[0]) << "LSE shape mismatch on dim 0";
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CHECK(lse->shape[1] == q->shape[1]) << "LSE shape mismatch on dim 1";
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void* float_buffer =
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static_cast<char*>(float_workspace_buffer->data) + float_workspace_buffer->byte_offset;
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void* int_buffer =
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static_cast<char*>(int_workspace_buffer->data) + int_workspace_buffer->byte_offset;
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const PosEncodingMode pos_encoding_mode = static_cast<PosEncodingMode>(pos_encoding_mode_code);
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// get q_scalar_type and kv_scalar_type
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DataType q_scalar_type(q->dtype);
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DataType kv_scalar_type(paged_kv_cache->dtype);
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// get q_stride_n and q_stride_h
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int64_t q_strides[3] = {q->strides ? q->strides[0] : q->shape[1] * q->shape[2], //
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q->strides ? q->strides[1] : q->shape[2], //
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q->strides ? q->strides[2] : 1};
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const auto q_stride_n = q_strides[0];
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const auto q_stride_h = q_strides[1];
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// get kv_cache_strides
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int64_t kv_cache_strides[4] = {
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paged_kv_cache->strides ? paged_kv_cache->strides[0]
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: paged_kv_cache->shape[1] * paged_kv_cache->shape[2] *
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paged_kv_cache->shape[3] * paged_kv_cache->shape[4],
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paged_kv_cache->strides ? paged_kv_cache->strides[2]
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: paged_kv_cache->shape[3] * paged_kv_cache->shape[4], //
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paged_kv_cache->strides ? paged_kv_cache->strides[3] : paged_kv_cache->shape[4], //
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paged_kv_cache->strides ? paged_kv_cache->strides[4] : 1};
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int64_t v_offset = paged_kv_cache->strides ? paged_kv_cache->strides[1]
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: paged_kv_cache->shape[2] * paged_kv_cache->shape[3] *
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paged_kv_cache->shape[4];
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cudaStream_t stream = static_cast<cudaStream_t>(cuda_stream);
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DISPATCH_context(
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DTypeQ, DTypeKV, DTypeO, IdType, HEAD_DIM_QK, HEAD_DIM_VO, POS_ENCODING_MODE,
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USE_SLIDING_WINDOW, USE_LOGITS_SOFT_CAP, AttentionVariant, Params, [&] {
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paged_kv_t<DTypeKV, IdType> paged_kv(
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num_kv_heads, page_size, HEAD_DIM_QK, batch_size, kv_layout,
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static_cast<DTypeKV*>(paged_kv_cache->data) +
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paged_kv_cache->byte_offset / sizeof(DTypeKV),
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static_cast<DTypeKV*>(paged_kv_cache->data) +
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paged_kv_cache->byte_offset / sizeof(DTypeKV) + v_offset,
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kv_cache_strides,
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static_cast<IdType*>(paged_kv_indices->data) +
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paged_kv_indices->byte_offset / sizeof(IdType),
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static_cast<IdType*>(paged_kv_indptr->data) +
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paged_kv_indptr->byte_offset / sizeof(IdType),
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static_cast<IdType*>(paged_kv_last_page_len->data) +
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paged_kv_last_page_len->byte_offset / sizeof(IdType),
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static_cast<IdType*>(paged_kv_rope_pos_offset->data) +
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paged_kv_rope_pos_offset->byte_offset / sizeof(IdType));
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Params params;
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params.q = static_cast<DTypeQ*>(q->data) + q->byte_offset / sizeof(DTypeQ);
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params.paged_kv = paged_kv;
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params.o = static_cast<DTypeO*>(o->data) + o->byte_offset / sizeof(DTypeO);
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params.lse = static_cast<float*>(lse->data) + lse->byte_offset / sizeof(float);
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params.padded_batch_size = 0;
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params.num_qo_heads = num_qo_heads;
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params.q_stride_n = q_stride_n;
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params.q_stride_h = q_stride_h;
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params.decode_maybe_q_rope_offset =
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static_cast<IdType*>(q_rope_offset->data) + q_rope_offset->byte_offset / sizeof(IdType);
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params.window_left = window_left;
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params.request_indices = nullptr;
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params.kv_tile_indices = nullptr;
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params.o_indptr = nullptr;
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params.kv_chunk_size_ptr = nullptr;
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params.block_valid_mask = nullptr;
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params.partition_kv = false;
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ADDITIONAL_PARAMS_SETTER
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DTypeO* tmp_v = nullptr;
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float* tmp_s = nullptr;
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params.request_indices =
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GetPtrFromBaseOffset<IdType>(int_buffer, plan_info.request_indices_offset);
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params.kv_tile_indices =
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GetPtrFromBaseOffset<IdType>(int_buffer, plan_info.kv_tile_indices_offset);
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params.o_indptr = GetPtrFromBaseOffset<IdType>(int_buffer, plan_info.o_indptr_offset);
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params.kv_chunk_size_ptr =
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GetPtrFromBaseOffset<IdType>(int_buffer, plan_info.kv_chunk_size_ptr_offset);
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if (plan_info.split_kv) {
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tmp_v = GetPtrFromBaseOffset<DTypeO>(float_buffer, plan_info.v_offset);
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tmp_s = GetPtrFromBaseOffset<float>(float_buffer, plan_info.s_offset);
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if (plan_info.enable_cuda_graph) {
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params.block_valid_mask =
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GetPtrFromBaseOffset<bool>(int_buffer, plan_info.block_valid_mask_offset);
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}
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}
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params.padded_batch_size = plan_info.padded_batch_size;
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cudaError_t status =
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flashinfer::BatchDecodeWithPagedKVCacheDispatched<HEAD_DIM_QK, POS_ENCODING_MODE,
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AttentionVariant>(
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params, tmp_v, tmp_s, /*enable_pdl=*/false, stream);
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CHECK(status == cudaSuccess)
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<< "BatchDecodeWithPagedKVCache failed with error " << cudaGetErrorString(status);
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return true;
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});
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}
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