782 lines
37 KiB
C++
782 lines
37 KiB
C++
// Copyright 2019 Google LLC
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//
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// This source code is licensed under the BSD-style license found in the
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// LICENSE file in the root directory of this source tree.
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#include <algorithm>
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#include <cfloat>
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#include <cmath>
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#include <cstdint>
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#include <functional>
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#include <random>
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#include <vector>
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#include "dwconv.h"
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#include "utils.h"
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#include "xnnpack.h"
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#include "xnnpack/common.h"
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#include "xnnpack/dwconv.h"
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#include "xnnpack/indirection.h"
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#include "xnnpack/math.h"
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#include "xnnpack/microfnptr.h"
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#include "xnnpack/microkernel-utils.h"
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#include "xnnpack/microparams-init.h"
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#include "xnnpack/pack.h"
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#include "xnnpack/buffer.h"
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#include <benchmark/benchmark.h>
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static void f16_dwconv(benchmark::State& state,
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xnn_f16_dwconv_minmax_unipass_ukernel_fn dwconv,
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xnn_init_f16_minmax_params_fn init_params,
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uint32_t channel_tile, uint32_t primary_tile,
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benchmark::utils::IsaCheckFunction isa_check = nullptr)
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{
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if (isa_check != nullptr && !isa_check(state)) {
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return;
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}
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const size_t input_height = state.range(0);
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const size_t input_width = state.range(1);
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const size_t kernel_height = state.range(2);
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const size_t kernel_width = state.range(3);
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const size_t padding_height = state.range(4);
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const size_t padding_width = state.range(5);
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const size_t subsampling = state.range(6);
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const size_t dilation = state.range(7);
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const size_t channels = state.range(8);
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const size_t kernel_size = kernel_height * kernel_width;
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if (kernel_size > primary_tile) {
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state.SkipWithError("kernel size mismatch");
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return;
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}
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std::random_device random_device;
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auto rng = std::mt19937(random_device());
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auto f32rng = std::bind(std::uniform_real_distribution<float>(0.0f, 1.0f), std::ref(rng));
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const size_t effective_kernel_height = (kernel_height - 1) * dilation + 1;
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const size_t effective_kernel_width = (kernel_width - 1) * dilation + 1;
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const size_t padding_left = padding_width / 2;
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const size_t padding_top = padding_height / 2;
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const size_t output_height = (input_height + padding_height - effective_kernel_height) / subsampling + 1;
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const size_t output_width = (input_width + padding_width - effective_kernel_width) / subsampling + 1;
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const size_t output_size = output_height * output_width;
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const size_t step_width = dilation == 1 ? std::min(subsampling, kernel_width) : kernel_width;
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const size_t step_height = kernel_size + (output_width - 1) * step_width * kernel_height;
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const size_t c_stride = benchmark::utils::RoundUp<size_t>(channels, channel_tile);
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xnnpack::Buffer<xnn_float16> a(channels * input_height * input_width + XNN_EXTRA_BYTES / sizeof(xnn_float16));
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std::generate(a.begin(), a.end(), f32rng);
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xnnpack::Buffer<xnn_float16> k(channels * kernel_height * kernel_width);
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std::generate(k.begin(), k.end(), f32rng);
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xnnpack::Buffer<xnn_float16> b(channels);
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std::generate(b.begin(), b.end(), f32rng);
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xnnpack::Buffer<xnn_float16> z(channels + XNN_EXTRA_BYTES / sizeof(xnn_float16));
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const size_t w_elements = (kernel_size + 1) * c_stride;
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// Can read (primary_tile - kernel_size) elements after end of indirection buffer.
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const size_t i_elements = (primary_tile - kernel_size) + output_height * step_height;
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const size_t c_elements = output_size * channels;
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const size_t num_buffers = 1 +
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benchmark::utils::DivideRoundUp<size_t>(benchmark::utils::GetMaxCacheSize(),
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sizeof(xnn_float16) * (w_elements + c_elements) + sizeof(void*) * i_elements);
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xnnpack::Buffer<xnn_float16, XNN_ALLOCATION_ALIGNMENT> w(w_elements * num_buffers);
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xnn_pack_f16_dwconv_ghw_w(primary_tile, 0, 0, kernel_height, kernel_width, channels,
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channel_tile, channel_tile, /*channel_round=*/1,
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reinterpret_cast<const uint16_t*>(k.data()),
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reinterpret_cast<const uint16_t*>(b.data()),
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/*scale=*/nullptr, reinterpret_cast<uint16_t*>(w.data()),
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/*per_tile_extra_bytes=*/0, /*per_subtile_extra_bytes=*/0, /*params=*/nullptr);
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for (size_t n = 1; n < num_buffers; n++) {
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std::copy(w.cbegin(), w.cbegin() + w_elements, w.begin() + n * w_elements);
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}
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xnnpack::Buffer<const xnn_float16*> i(i_elements * num_buffers);
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xnn_indirection_init_dwconv2d(
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/*output_y_start=*/0, /*output_y_end=*/output_height,
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reinterpret_cast<const void**>(i.data()),
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a.data(),
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channels << XNN_LOG2_SIZEOF_HALF,
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z.data(),
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input_height, input_width,
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output_height, output_width,
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kernel_height, kernel_width,
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subsampling, subsampling,
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dilation, dilation,
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padding_top, padding_left,
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step_height, step_width, primary_tile);
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for (size_t n = 1; n < num_buffers; n++) {
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std::copy(i.cbegin(), i.cbegin() + i_elements, i.begin() + n * i_elements);
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}
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xnnpack::Buffer<xnn_float16> c(c_elements * num_buffers);
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xnn_f16_minmax_params params;
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init_params(¶ms, static_cast<xnn_float16>(-INFINITY), static_cast<xnn_float16>(INFINITY));
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size_t buffer_index = 0;
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for (auto _ : state) {
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state.PauseTiming();
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benchmark::utils::PrefetchToL1(a.data(), a.size() * sizeof(xnn_float16));
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buffer_index = (buffer_index + 1) % num_buffers;
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state.ResumeTiming();
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for (size_t y = 0; y < output_height; y++) {
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dwconv(channels, output_width,
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reinterpret_cast<const xnn_float16**>(i.data() + buffer_index * i_elements + step_height * y),
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w.data() + buffer_index * w_elements,
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c.data() + buffer_index * c_elements + y * output_width * channels,
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kernel_height * step_width * sizeof(void*), 0,
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0, z.data(), ¶ms);
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}
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}
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const uint64_t cpu_frequency = benchmark::utils::GetCurrentCpuFrequency();
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if (cpu_frequency != 0) {
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state.counters["cpufreq"] = cpu_frequency;
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}
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state.counters["FLOPS"] = benchmark::Counter(
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uint64_t(state.iterations()) * 2 * output_size * channels * kernel_size, benchmark::Counter::kIsRate);
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state.counters["bytes"] = benchmark::Counter(
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uint64_t(state.iterations()) * (output_size + input_height * input_width + kernel_size + 1 /* bias */) * channels * sizeof(xnn_float16),
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benchmark::Counter::kIsRate);
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}
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static void f16_dwconv(benchmark::State& state,
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xnn_f16_dwconv_minmax_multipass_ukernel_fn dwconv,
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xnn_init_f16_minmax_params_fn init_params,
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uint32_t first_pass_tile,
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uint32_t middle_pass_tile,
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uint32_t last_pass_tile,
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uint32_t channel_tile,
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uint32_t channel_subtile,
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uint32_t channel_round,
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benchmark::utils::IsaCheckFunction isa_check = nullptr)
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{
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if (isa_check != nullptr && !isa_check(state)) {
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return;
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}
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const size_t input_height = state.range(0);
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const size_t input_width = state.range(1);
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const size_t kernel_height = state.range(2);
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const size_t kernel_width = state.range(3);
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const size_t padding_height = state.range(4);
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const size_t padding_width = state.range(5);
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const size_t subsampling = state.range(6);
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const size_t dilation = state.range(7);
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const size_t channels = state.range(8);
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const size_t kernel_size = kernel_height * kernel_width;
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if (kernel_size <= first_pass_tile) {
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state.SkipWithError("kernel size mismatch");
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return;
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}
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std::random_device random_device;
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auto rng = std::mt19937(random_device());
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auto f32rng = std::bind(std::uniform_real_distribution<float>(0.0f, 1.0f), std::ref(rng));
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const size_t effective_kernel_height = (kernel_height - 1) * dilation + 1;
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const size_t effective_kernel_width = (kernel_width - 1) * dilation + 1;
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const size_t padding_left = padding_width / 2;
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const size_t padding_top = padding_height / 2;
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const size_t output_height = (input_height + padding_height - effective_kernel_height) / subsampling + 1;
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const size_t output_width = (input_width + padding_width - effective_kernel_width) / subsampling + 1;
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const size_t output_size = output_height * output_width;
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const size_t step_width = dilation == 1 ? std::min(subsampling, kernel_width) : kernel_width;
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const size_t step_height = kernel_size + (output_width - 1) * step_width * kernel_height;
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xnnpack::Buffer<xnn_float16> a(channels * input_height * input_width + XNN_EXTRA_BYTES / sizeof(xnn_float16));
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std::generate(a.begin(), a.end(), f32rng);
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xnnpack::Buffer<xnn_float16> k(channels * kernel_size);
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std::generate(k.begin(), k.end(), f32rng);
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xnnpack::Buffer<xnn_float16> b(channels);
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std::generate(b.begin(), b.end(), f32rng);
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xnnpack::Buffer<xnn_float16> z(channels + XNN_EXTRA_BYTES / sizeof(xnn_float16));
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xnnpack::Buffer<xnn_float16, XNN_ALLOCATION_ALIGNMENT> buffer(
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channels + XNN_MULTIPASS_EXTRA_BYTES / sizeof(xnn_float16));
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const size_t tile_size = xnn_dwconv_multipass_tile_size(
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kernel_size, first_pass_tile, middle_pass_tile, last_pass_tile);
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const size_t w_elements =
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xnn_dwconv_multipass_weights_size(
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tile_size, channels, channel_tile, channel_subtile, channel_round, /*bias_element_size=*/sizeof(xnn_float16),
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/*log2_filter_element_size=*/1, /*extra_weights_byte=*/0) /
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sizeof(xnn_float16);
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// Can read (primary_tile - kernel_size) elements after end of indirection buffer.
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const size_t i_elements = tile_size - kernel_size + output_height * step_height;
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const size_t c_elements = output_size * channels;
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const size_t num_buffers = 1 +
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benchmark::utils::DivideRoundUp<size_t>(benchmark::utils::GetMaxCacheSize(),
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sizeof(xnn_float16) * (w_elements + c_elements) + sizeof(void*) * i_elements);
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xnnpack::Buffer<xnn_float16, XNN_ALLOCATION_ALIGNMENT> w(w_elements * num_buffers);
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xnn_pack_f16_dwconv_ghw_w(
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first_pass_tile, middle_pass_tile, last_pass_tile,
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kernel_height, kernel_width,
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channels, channel_tile, channel_subtile, channel_round,
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reinterpret_cast<const uint16_t*>(k.data()),
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reinterpret_cast<const uint16_t*>(b.data()),
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/*scale=*/nullptr, reinterpret_cast<uint16_t*>(w.data()),
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/*per_tile_extra_bytes=*/0, /*per_subtile_extra_bytes=*/0, nullptr);
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for (size_t n = 1; n < num_buffers; n++) {
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std::copy(w.cbegin(), w.cbegin() + w_elements, w.begin() + n * w_elements);
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}
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xnnpack::Buffer<const xnn_float16*> i(i_elements * num_buffers);
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xnn_indirection_init_dwconv2d(
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/*output_y_start=*/0, /*output_y_end=*/output_height,
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reinterpret_cast<const void**>(i.data()),
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a.data(),
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channels << XNN_LOG2_SIZEOF_HALF,
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z.data(),
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input_height, input_width,
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output_height, output_width,
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kernel_height, kernel_width,
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subsampling, subsampling,
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dilation, dilation,
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padding_top, padding_left,
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step_height, step_width, tile_size);
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for (size_t n = 1; n < num_buffers; n++) {
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std::copy(i.cbegin(), i.cbegin() + i_elements, i.begin() + n * i_elements);
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}
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xnnpack::Buffer<xnn_float16> c(c_elements * num_buffers);
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xnn_f16_minmax_params params;
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init_params(¶ms, static_cast<xnn_float16>(-INFINITY), static_cast<xnn_float16>(INFINITY));
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const int input_advanced = tile_size - last_pass_tile;
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const int input_stride_elements = kernel_height * step_width - input_advanced;
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size_t buffer_index = 0;
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for (auto _ : state) {
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state.PauseTiming();
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benchmark::utils::PrefetchToL1(a.data(), a.size() * sizeof(xnn_float16));
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buffer_index = (buffer_index + 1) % num_buffers;
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state.ResumeTiming();
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for (size_t y = 0; y < output_height; y++) {
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dwconv(channels, output_width,
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reinterpret_cast<const xnn_float16**>(i.data() + buffer_index * i_elements + step_height * y),
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w.data() + buffer_index * w_elements,
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c.data() + buffer_index * c_elements + y * output_width * channels,
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input_stride_elements * sizeof(void*), 0,
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0, z.data(), kernel_size, buffer.data(), ¶ms);
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}
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}
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const uint64_t cpu_frequency = benchmark::utils::GetCurrentCpuFrequency();
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if (cpu_frequency != 0) {
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state.counters["cpufreq"] = cpu_frequency;
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}
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state.counters["FLOPS"] = benchmark::Counter(
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uint64_t(state.iterations()) * 2 * output_size * channels * kernel_size, benchmark::Counter::kIsRate);
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state.counters["bytes"] = benchmark::Counter(
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uint64_t(state.iterations()) * (output_size + input_height * input_width + kernel_size + 1 /* bias */) * channels * sizeof(xnn_float16),
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benchmark::Counter::kIsRate);
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}
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#if XNN_ENABLE_ARM_FP16_VECTOR && (XNN_ARCH_ARM || XNN_ARCH_ARM64)
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static void f16_dwconv_4p8c__neonfp16arith_acc2(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_4p8c__neonfp16arith_acc2,
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xnn_init_f16_minmax_scalar_params,
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8, 4, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_4p8c__neonfp16arith(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_4p8c__neonfp16arith,
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xnn_init_f16_minmax_scalar_params,
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8, 4, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_9p8c__neonfp16arith_acc2(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_9p8c__neonfp16arith_acc2,
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xnn_init_f16_minmax_scalar_params,
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8, 9, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_9p8c__neonfp16arith(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_9p8c__neonfp16arith,
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xnn_init_f16_minmax_scalar_params,
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8, 9, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_25p8c__neonfp16arith_acc2(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_25p8c__neonfp16arith_acc2,
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xnn_init_f16_minmax_scalar_params,
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8, 25, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_25p8c__neonfp16arith(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_25p8c__neonfp16arith,
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xnn_init_f16_minmax_scalar_params,
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8, 25, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_4p16c__neonfp16arith_acc2(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_4p16c__neonfp16arith_acc2,
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xnn_init_f16_minmax_scalar_params,
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16, 4, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_4p16c__neonfp16arith(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_4p16c__neonfp16arith,
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xnn_init_f16_minmax_scalar_params,
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16, 4, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_9p16c__neonfp16arith_acc2(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_9p16c__neonfp16arith_acc2,
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xnn_init_f16_minmax_scalar_params,
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16, 9, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_9p16c__neonfp16arith(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_9p16c__neonfp16arith,
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xnn_init_f16_minmax_scalar_params,
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16, 9, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_25p16c__neonfp16arith_acc2(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_25p16c__neonfp16arith_acc2,
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xnn_init_f16_minmax_scalar_params,
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16, 25, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_25p16c__neonfp16arith(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_25p16c__neonfp16arith,
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xnn_init_f16_minmax_scalar_params,
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16, 25, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_4p32c__neonfp16arith_acc2(benchmark::State& state, const char* net) {
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f16_dwconv(state,
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xnn_f16_dwconv_minmax_ukernel_4p32c__neonfp16arith_acc2,
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xnn_init_f16_minmax_scalar_params,
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32, 4, benchmark::utils::CheckNEONFP16ARITH);
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}
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static void f16_dwconv_4p32c__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(state,
|
|
xnn_f16_dwconv_minmax_ukernel_4p32c__neonfp16arith,
|
|
xnn_init_f16_minmax_scalar_params,
|
|
32, 4, benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
|
|
static void f16_dwconv_9p32c__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(state,
|
|
xnn_f16_dwconv_minmax_ukernel_9p32c__neonfp16arith_acc2,
|
|
xnn_init_f16_minmax_scalar_params,
|
|
32, 9, benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
|
|
static void f16_dwconv_9p32c__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(state,
|
|
xnn_f16_dwconv_minmax_ukernel_9p32c__neonfp16arith,
|
|
xnn_init_f16_minmax_scalar_params,
|
|
32, 9, benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
|
|
static void f16_dwconv_25p32c__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(state,
|
|
xnn_f16_dwconv_minmax_ukernel_25p32c__neonfp16arith_acc2,
|
|
xnn_init_f16_minmax_scalar_params,
|
|
32, 25, benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
|
|
static void f16_dwconv_25p32c__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(state,
|
|
xnn_f16_dwconv_minmax_ukernel_25p32c__neonfp16arith,
|
|
xnn_init_f16_minmax_scalar_params,
|
|
32, 25, benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
|
|
static void f16_dwconv_5f5m5l8c8s4r__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l8c8s4r__neonfp16arith, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_5f5m5l8c8s4r__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l8c8s4r__neonfp16arith_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_5f5m5l16c8s4r__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l16c8s4r__neonfp16arith, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_5f5m5l16c8s4r__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l16c8s4r__neonfp16arith_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_5f5m5l32c8s4r__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l32c8s4r__neonfp16arith, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_5f5m5l32c8s4r__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l32c8s4r__neonfp16arith_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
|
|
static void f16_dwconv_6f6m7l8c8s4r__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l8c8s4r__neonfp16arith, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_6f6m7l8c8s4r__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l8c8s4r__neonfp16arith_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_6f6m7l16c8s4r__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l16c8s4r__neonfp16arith, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_6f6m7l16c8s4r__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l16c8s4r__neonfp16arith_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_6f6m7l32c8s4r__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l32c8s4r__neonfp16arith, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_6f6m7l32c8s4r__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l32c8s4r__neonfp16arith_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
|
|
static void f16_dwconv_8f8m9l8c8s4r__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l8c8s4r__neonfp16arith, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_8f8m9l8c8s4r__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l8c8s4r__neonfp16arith_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_8f8m9l16c8s4r__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l16c8s4r__neonfp16arith, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_8f8m9l16c8s4r__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l16c8s4r__neonfp16arith_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_8f8m9l32c8s4r__neonfp16arith(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l32c8s4r__neonfp16arith, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
static void f16_dwconv_8f8m9l32c8s4r__neonfp16arith_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l32c8s4r__neonfp16arith_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckNEONFP16ARITH);
|
|
}
|
|
|
|
BENCHMARK_DWCONV(f16_dwconv_4p8c__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_4p8c__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_9p8c__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_9p8c__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p8c__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p8c__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_4p16c__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_4p16c__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_9p16c__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_9p16c__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p16c__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p16c__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_4p32c__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_4p32c__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_9p32c__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_9p32c__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p32c__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p32c__neonfp16arith)
|
|
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l8c8s4r__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l8c8s4r__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l16c8s4r__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l16c8s4r__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l32c8s4r__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l32c8s4r__neonfp16arith_acc2)
|
|
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l8c8s4r__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l8c8s4r__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l16c8s4r__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l16c8s4r__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l32c8s4r__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l32c8s4r__neonfp16arith_acc2)
|
|
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l8c8s4r__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l8c8s4r__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l16c8s4r__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l16c8s4r__neonfp16arith_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l32c8s4r__neonfp16arith)
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l32c8s4r__neonfp16arith_acc2)
|
|
#endif // XNN_ENABLE_ARM_FP16_VECTOR && (XNN_ARCH_ARM || XNN_ARCH_ARM64)
|
|
|
|
|
|
#if XNN_ARCH_X86 || XNN_ARCH_X86_64
|
|
static void f16_dwconv_25p8c__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_25p8c__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*channel_tile=*/8, /*primary_tile=*/25, /*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_25p8c__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_25p8c__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*channel_tile=*/8, /*primary_tile=*/25, /*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_25p16c__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_25p16c__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*channel_tile=*/16, /*primary_tile=*/25, /*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_25p16c__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_25p16c__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*channel_tile=*/16, /*primary_tile=*/25, /*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_25p32c__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_25p32c__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*channel_tile=*/32, /*primary_tile=*/25, /*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_25p32c__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_25p32c__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*channel_tile=*/32, /*primary_tile=*/25, /*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
|
|
static void f16_dwconv_5f5m5l8c8s4r__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l8c8s4r__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_5f5m5l8c8s4r__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l8c8s4r__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_5f5m5l16c8s4r__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l16c8s4r__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_5f5m5l16c8s4r__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l16c8s4r__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_5f5m5l32c8s4r__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l32c8s4r__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_5f5m5l32c8s4r__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_5f5m5l32c8s4r__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/5, /*middle_pass_tile=*/5, /*last_pass_tile=*/5,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
|
|
static void f16_dwconv_6f6m7l8c8s4r__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l8c8s4r__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_6f6m7l8c8s4r__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l8c8s4r__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_6f6m7l16c8s4r__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l16c8s4r__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_6f6m7l16c8s4r__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l16c8s4r__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_6f6m7l32c8s4r__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l32c8s4r__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_6f6m7l32c8s4r__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_6f6m7l32c8s4r__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/6, /*middle_pass_tile=*/6, /*last_pass_tile=*/7,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
|
|
static void f16_dwconv_8f8m9l8c8s4r__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l8c8s4r__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_8f8m9l8c8s4r__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l8c8s4r__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/8, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_8f8m9l16c8s4r__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l16c8s4r__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_8f8m9l16c8s4r__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l16c8s4r__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/16, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_8f8m9l32c8s4r__fma3(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l32c8s4r__fma3, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f16_dwconv_8f8m9l32c8s4r__fma3_acc2(benchmark::State& state, const char* net) {
|
|
f16_dwconv(
|
|
state, xnn_f16_dwconv_minmax_ukernel_8f8m9l32c8s4r__fma3_acc2, xnn_init_f16_minmax_scalar_params,
|
|
/*first_pass_tile=*/8, /*middle_pass_tile=*/8, /*last_pass_tile=*/9,
|
|
/*channel_tile=*/32, /*channel_subtile=*/8, /*channel_round=*/4,
|
|
/*isa_check=*/benchmark::utils::CheckFMA3);
|
|
}
|
|
|
|
BENCHMARK_DWCONV(f16_dwconv_25p8c__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p8c__fma3_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p16c__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p16c__fma3_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p32c__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_25p32c__fma3_acc2)
|
|
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l8c8s4r__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l8c8s4r__fma3_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l16c8s4r__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l16c8s4r__fma3_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l32c8s4r__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_5f5m5l32c8s4r__fma3_acc2)
|
|
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l8c8s4r__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l8c8s4r__fma3_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l16c8s4r__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l16c8s4r__fma3_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l32c8s4r__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_6f6m7l32c8s4r__fma3_acc2)
|
|
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l8c8s4r__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l8c8s4r__fma3_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l16c8s4r__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l16c8s4r__fma3_acc2)
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l32c8s4r__fma3)
|
|
BENCHMARK_DWCONV(f16_dwconv_8f8m9l32c8s4r__fma3_acc2)
|
|
|
|
#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
|
|
|
|
#ifndef XNNPACK_BENCHMARK_NO_MAIN
|
|
BENCHMARK_MAIN();
|
|
#endif
|