1268 lines
53 KiB
C++
1268 lines
53 KiB
C++
// Copyright 2019 Google LLC
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//
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// This source code is licensed under the BSD-style license found in the
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// LICENSE file in the root directory of this source tree.
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#include <algorithm>
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#include <cfloat>
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#include <cmath>
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#include <functional>
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#include <limits>
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#include <random>
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#include <vector>
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#include "conv.h"
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#include "utils.h"
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#include "xnnpack/common.h"
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#include "xnnpack/igemm.h"
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#include "xnnpack/indirection.h"
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#include "xnnpack/math.h"
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#include "xnnpack/microfnptr.h"
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#include "xnnpack/microparams-init.h"
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#include "xnnpack/pack.h"
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#include "xnnpack/buffer.h"
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#include <benchmark/benchmark.h>
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static void f32_igemm(benchmark::State& state,
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xnn_f32_igemm_minmax_ukernel_fn igemm,
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xnn_init_f32_minmax_params_fn init_params,
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uint32_t mr, uint32_t nr, uint32_t kr, uint32_t sr,
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benchmark::utils::IsaCheckFunction isa_check = nullptr)
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{
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if (isa_check != nullptr && !isa_check(state)) {
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return;
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}
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const size_t input_height = state.range(0);
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const size_t input_width = state.range(1);
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const size_t kernel_height = state.range(2);
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const size_t kernel_width = state.range(3);
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const size_t kernel_size = kernel_height * kernel_width;
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const size_t padding_height = state.range(4);
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const size_t padding_width = state.range(5);
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const size_t subsampling = state.range(6);
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const size_t dilation = state.range(7);
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const size_t group_input_channels = state.range(8);
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const size_t group_output_channels = state.range(9);
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std::random_device random_device;
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auto rng = std::mt19937(random_device());
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auto f32rng = std::bind(std::uniform_real_distribution<float>(0.0f, 1.0f), std::ref(rng));
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const size_t output_pixel_stride = group_output_channels;
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const size_t input_pixel_stride = group_input_channels;
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const size_t effective_kernel_height = (kernel_height - 1) * dilation + 1;
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const size_t effective_kernel_width = (kernel_width - 1) * dilation + 1;
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const size_t padding_left = padding_width / 2;
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const size_t padding_top = padding_height / 2;
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const size_t output_height = (input_height + padding_height - effective_kernel_height) / subsampling + 1;
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const size_t output_width = (input_width + padding_width - effective_kernel_width) / subsampling + 1;
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const size_t output_size = output_height * output_width;
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const size_t mc_stride = benchmark::utils::RoundUp<size_t>(output_size, mr);
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const size_t nc_stride = benchmark::utils::RoundUp<size_t>(group_output_channels, nr);
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const size_t kc_stride = benchmark::utils::RoundUp<size_t>(group_input_channels, kr * sr);
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xnnpack::Buffer<float> a(input_height * input_width * input_pixel_stride + XNN_EXTRA_BYTES / sizeof(float));
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std::generate(a.begin(), a.end(), std::ref(f32rng));
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xnnpack::Buffer<float> k(group_output_channels * kernel_height * kernel_width * group_input_channels);
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std::generate(k.begin(), k.end(), std::ref(f32rng));
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xnnpack::Buffer<float> b(group_output_channels);
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std::generate(b.begin(), b.end(), std::ref(f32rng));
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xnnpack::Buffer<float> z(group_input_channels + XNN_EXTRA_BYTES / sizeof(float));
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const size_t w_elements = kernel_size * kc_stride * nc_stride + nc_stride;
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const size_t i_elements = mc_stride * kernel_size;
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const size_t c_elements = output_height * output_width * output_pixel_stride;
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const size_t num_buffers = 1 +
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benchmark::utils::DivideRoundUp<size_t>(benchmark::utils::GetMaxCacheSize(),
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sizeof(float) * (w_elements + c_elements) + sizeof(void*) * i_elements);
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xnnpack::Buffer<float, XNN_ALLOCATION_ALIGNMENT> w(w_elements * num_buffers);
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xnn_pack_f32_conv_goki_w(
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/*groups=*/1, group_output_channels, kernel_size, group_input_channels,
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nr, kr, sr, k.data(), b.data(), /*scale=*/nullptr, w.data(), /*extra_bytes=*/0, /*params=*/nullptr);
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for (size_t n = 1; n < num_buffers; n++) {
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std::copy(w.cbegin(), w.cbegin() + w_elements, w.begin() + n * w_elements);
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}
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xnnpack::Buffer<const float*> i(i_elements * num_buffers);
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const size_t tiled_output_size = round_up(output_size, mr);
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xnn_indirection_init_conv2d(
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/*output_tile_size=*/mr,
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/*output_start=*/0,
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/*output_end=*/tiled_output_size,
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reinterpret_cast<const void**>(i.data()),
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a.data(),
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z.data(),
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input_pixel_stride << XNN_LOG2_SIZEOF_FLOAT,
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input_height, input_width,
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output_height, output_width,
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kernel_height, kernel_width,
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subsampling, subsampling,
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dilation, dilation,
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padding_top, padding_left);
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for (size_t n = 1; n < num_buffers; n++) {
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std::copy(i.cbegin(), i.cbegin() + i_elements, i.begin() + n * i_elements);
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}
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xnnpack::Buffer<float> c(c_elements * num_buffers);
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xnn_f32_minmax_params params;
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init_params(¶ms,
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-std::numeric_limits<float>::infinity(), +std::numeric_limits<float>::infinity());
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size_t buffer_index = 0;
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for (auto _ : state) {
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state.PauseTiming();
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benchmark::utils::PrefetchToL1(a.data(), a.size() * sizeof(float));
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buffer_index = (buffer_index + 1) % num_buffers;
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state.ResumeTiming();
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for (uint32_t m = 0; m < output_size; m += mr) {
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const uint32_t mb = min(output_size - m, mr);
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igemm(
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mb, group_output_channels, group_input_channels * sizeof(float), kernel_size * mr * sizeof(void*),
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i.data() + buffer_index * i_elements + m,
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w.data() + buffer_index * w_elements,
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c.data() + buffer_index * c_elements + m * group_output_channels, group_output_channels * sizeof(float), nr * sizeof(float),
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0, z.data(), ¶ms);
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}
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}
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const uint64_t cpu_frequency = benchmark::utils::GetCurrentCpuFrequency();
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if (cpu_frequency != 0) {
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state.counters["cpufreq"] = cpu_frequency;
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}
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state.counters["FLOPS"] = benchmark::Counter(
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uint64_t(state.iterations()) * 2 *
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output_height * output_width *
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group_input_channels * group_output_channels *
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kernel_height * kernel_width,
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benchmark::Counter::kIsRate);
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}
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#if XNN_ARCH_ARM && XNN_ENABLE_ASSEMBLY
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static void f32_igemm_4x8__asm_aarch32_neon_ld64(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch32_neon_ld64,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch32_neon_cortex_a7(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch32_neon_cortex_a7,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch32_neon_cortex_a53(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch32_neon_cortex_a53,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch32_neon_cortex_a53_prfm(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch32_neon_cortex_a53_prfm,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch32_neon_cortex_a55(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch32_neon_cortex_a55,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch32_neon_cortex_a75_prfm(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch32_neon_cortex_a75_prfm,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch32_neon_cortex_a75(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch32_neon_cortex_a75,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_1x8__asm_aarch32_neon_cortex_a53(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_1x8__asm_aarch32_neon_cortex_a53,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_1x8__asm_aarch32_neon_cortex_a53_prfm(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_1x8__asm_aarch32_neon_cortex_a53_prfm,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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BENCHMARK_CONV(f32_igemm_4x8__asm_aarch32_neon_ld64)
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BENCHMARK_CONV(f32_igemm_4x8__asm_aarch32_neon_cortex_a7)
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BENCHMARK_CONV(f32_igemm_4x8__asm_aarch32_neon_cortex_a53)
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BENCHMARK_CONV(f32_igemm_4x8__asm_aarch32_neon_cortex_a53_prfm)
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BENCHMARK_CONV(f32_igemm_4x8__asm_aarch32_neon_cortex_a55)
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BENCHMARK_CONV(f32_igemm_4x8__asm_aarch32_neon_cortex_a75_prfm)
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BENCHMARK_CONV(f32_igemm_4x8__asm_aarch32_neon_cortex_a75)
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BENCHMARK_CONV(f32_igemm_1x8__asm_aarch32_neon_cortex_a53)
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BENCHMARK_CONV(f32_igemm_1x8__asm_aarch32_neon_cortex_a53_prfm)
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#endif // XNN_ARCH_ARM && XNN_ENABLE_ASSEMBLY
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#if XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
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static void f32_igemm_1x8__asm_aarch64_neonfma_ld64(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_1x8__asm_aarch64_neonfma_ld64,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_1x8__asm_aarch64_neonfma_ld64_prfm(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_1x8__asm_aarch64_neonfma_ld64_prfm,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_1x12__asm_aarch64_neonfma_cortex_a53(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_1x12__asm_aarch64_neonfma_cortex_a53,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/1, /*nr=*/12, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_1x8__asm_aarch64_neonfma_cortex_a53(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_1x8__asm_aarch64_neonfma_cortex_a53,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_1x8__asm_aarch64_neonfma_cortex_a53_prfm(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_1x8__asm_aarch64_neonfma_cortex_a53_prfm,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_1x8__asm_aarch64_neonfma_cortex_a75(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_1x8__asm_aarch64_neonfma_cortex_a75,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_1x8__asm_aarch64_neonfma_cortex_a75_prfm(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_1x8__asm_aarch64_neonfma_cortex_a75_prfm,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x2__asm_aarch64_neonfma_cortex_a75(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x2__asm_aarch64_neonfma_cortex_a75,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/2, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x2__asm_aarch64_neonfma_cortex_a75_prfm(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x2__asm_aarch64_neonfma_cortex_a75_prfm,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/2, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x2__asm_aarch64_neonfma_ld64(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x2__asm_aarch64_neonfma_ld64,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/2, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch64_neonfma_cortex_a53(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch64_neonfma_cortex_a53,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch64_neonfma_cortex_a53_prfm(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch64_neonfma_cortex_a53_prfm,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch64_neonfma_cortex_a55(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch64_neonfma_cortex_a55,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch64_neonfma_cortex_a75(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch64_neonfma_cortex_a75,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch64_neonfma_cortex_a75_prfm(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch64_neonfma_cortex_a75_prfm,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch64_neonfma_ld64(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch64_neonfma_ld64,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_4x8__asm_aarch64_neonfma_ld128(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_4x8__asm_aarch64_neonfma_ld128,
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xnn_init_f32_minmax_scalar_params,
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/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
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}
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static void f32_igemm_5x8__asm_aarch64_neonfma_cortex_a75(benchmark::State& state, const char* net) {
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_5x8__asm_aarch64_neonfma_cortex_a75,
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xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_5x8__asm_aarch64_neonfma_cortex_a75_prfm(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8__asm_aarch64_neonfma_cortex_a75_prfm,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_4x12__asm_aarch64_neonfma_cortex_a53(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x12__asm_aarch64_neonfma_cortex_a53,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/12, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__asm_aarch64_neonfma_cortex_a53(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__asm_aarch64_neonfma_cortex_a53,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__asm_aarch64_neonfma_cortex_a53_prfm(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__asm_aarch64_neonfma_cortex_a53_prfm,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__asm_aarch64_neonfma_cortex_a55(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__asm_aarch64_neonfma_cortex_a55,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__asm_aarch64_neonfma_cortex_a73(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__asm_aarch64_neonfma_cortex_a73,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__asm_aarch64_neonfma_cortex_a75(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__asm_aarch64_neonfma_cortex_a75,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__asm_aarch64_neonfma_cortex_a75_prfm(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__asm_aarch64_neonfma_cortex_a75_prfm,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__asm_aarch64_neonfma_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__asm_aarch64_neonfma_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__asm_aarch64_neonfma_ld128(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__asm_aarch64_neonfma_ld128,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_1x8__aarch64_neonfma_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8__aarch64_neonfma_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_4x2__aarch64_neonfma_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x2__aarch64_neonfma_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/2, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x2__aarch64_neonfma_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x2__aarch64_neonfma_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/2, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_4x4__aarch64_neonfma_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x4__aarch64_neonfma_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/4, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_4x8__aarch64_neonfma_lane_ld128(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__aarch64_neonfma_lane_ld128,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_4x8__aarch64_neonfma_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__aarch64_neonfma_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__aarch64_neonfma_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__aarch64_neonfma_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__aarch64_neonfma_lane_ld128(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__aarch64_neonfma_lane_ld128,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
BENCHMARK_CONV(f32_igemm_1x8__asm_aarch64_neonfma_ld64)
|
|
BENCHMARK_CONV(f32_igemm_1x8__asm_aarch64_neonfma_ld64_prfm)
|
|
BENCHMARK_CONV(f32_igemm_1x8__asm_aarch64_neonfma_cortex_a53)
|
|
BENCHMARK_CONV(f32_igemm_1x8__asm_aarch64_neonfma_cortex_a53_prfm)
|
|
BENCHMARK_CONV(f32_igemm_1x8__asm_aarch64_neonfma_cortex_a75)
|
|
BENCHMARK_CONV(f32_igemm_1x8__asm_aarch64_neonfma_cortex_a75_prfm)
|
|
BENCHMARK_CONV(f32_igemm_1x12__asm_aarch64_neonfma_cortex_a53)
|
|
BENCHMARK_CONV(f32_igemm_4x2__asm_aarch64_neonfma_cortex_a75)
|
|
BENCHMARK_CONV(f32_igemm_4x2__asm_aarch64_neonfma_cortex_a75_prfm)
|
|
BENCHMARK_CONV(f32_igemm_4x2__asm_aarch64_neonfma_ld64)
|
|
BENCHMARK_CONV(f32_igemm_4x8__asm_aarch64_neonfma_cortex_a53)
|
|
BENCHMARK_CONV(f32_igemm_4x8__asm_aarch64_neonfma_cortex_a53_prfm)
|
|
BENCHMARK_CONV(f32_igemm_4x8__asm_aarch64_neonfma_cortex_a55)
|
|
BENCHMARK_CONV(f32_igemm_4x8__asm_aarch64_neonfma_cortex_a75)
|
|
BENCHMARK_CONV(f32_igemm_4x8__asm_aarch64_neonfma_cortex_a75_prfm)
|
|
BENCHMARK_CONV(f32_igemm_4x8__asm_aarch64_neonfma_ld64)
|
|
BENCHMARK_CONV(f32_igemm_4x8__asm_aarch64_neonfma_ld128)
|
|
BENCHMARK_CONV(f32_igemm_4x12__asm_aarch64_neonfma_cortex_a53)
|
|
BENCHMARK_CONV(f32_igemm_5x8__asm_aarch64_neonfma_cortex_a75)
|
|
BENCHMARK_CONV(f32_igemm_5x8__asm_aarch64_neonfma_cortex_a75_prfm)
|
|
BENCHMARK_CONV(f32_igemm_6x8__asm_aarch64_neonfma_cortex_a53)
|
|
BENCHMARK_CONV(f32_igemm_6x8__asm_aarch64_neonfma_cortex_a53_prfm)
|
|
BENCHMARK_CONV(f32_igemm_6x8__asm_aarch64_neonfma_cortex_a55)
|
|
BENCHMARK_CONV(f32_igemm_6x8__asm_aarch64_neonfma_cortex_a73)
|
|
BENCHMARK_CONV(f32_igemm_6x8__asm_aarch64_neonfma_cortex_a75)
|
|
BENCHMARK_CONV(f32_igemm_6x8__asm_aarch64_neonfma_cortex_a75_prfm)
|
|
BENCHMARK_CONV(f32_igemm_6x8__asm_aarch64_neonfma_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x8__asm_aarch64_neonfma_ld128)
|
|
BENCHMARK_CONV(f32_igemm_1x8__aarch64_neonfma_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_4x2__aarch64_neonfma_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x2__aarch64_neonfma_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_4x4__aarch64_neonfma_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_4x8__aarch64_neonfma_lane_ld128)
|
|
BENCHMARK_CONV(f32_igemm_4x8__aarch64_neonfma_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x8__aarch64_neonfma_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x8__aarch64_neonfma_lane_ld128)
|
|
#endif // XNN_ARCH_ARM64 && XNN_ENABLE_ASSEMBLY
|
|
|
|
|
|
#if XNN_ARCH_ARM || XNN_ARCH_ARM64
|
|
static void f32_igemm_1x8__neon_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8__neon_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_4x2__neon_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x2__neon_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/2, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_6x2__neon_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x2__neon_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/2, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_4x4__neon_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x4__neon_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/4, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_4x8__neon_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__neon_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_4x8__neon_lane_ld128(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__neon_lane_ld128,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_6x8__neon_lane_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__neon_lane_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_6x8__neon_lane_ld128(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__neon_lane_ld128,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_1x8__neon_dup_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8__neon_dup_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_4x8__neon_dup_ld128(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__neon_dup_ld128,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_4x8__neon_dup_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__neon_dup_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_6x8__neon_dup_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__neon_dup_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_6x8__neon_dup_ld128(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__neon_dup_ld128,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_1x8__neonfma_dup_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8__neonfma_dup_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEONFMA);
|
|
}
|
|
static void f32_igemm_4x8__neonfma_dup_ld128(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__neonfma_dup_ld128,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEONFMA);
|
|
}
|
|
static void f32_igemm_4x8__neonfma_dup_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__neonfma_dup_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEONFMA);
|
|
}
|
|
static void f32_igemm_6x8__neonfma_dup_ld64(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__neonfma_dup_ld64,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEONFMA);
|
|
}
|
|
static void f32_igemm_6x8__neonfma_dup_ld128(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__neonfma_dup_ld128,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckNEONFMA);
|
|
}
|
|
static void f32_igemm_1x8s4__neon(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8s4__neon,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/4,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_4x8s4__neon(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8s4__neon,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/4,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_6x8s4__neon(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8s4__neon,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/4,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_8x8s4__neon(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_8x8s4__neon,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/8, /*nr=*/8, /*kr=*/1, /*sr=*/4,
|
|
benchmark::utils::CheckNEON);
|
|
}
|
|
static void f32_igemm_1x8s4__neonfma(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8s4__neonfma,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/4,
|
|
benchmark::utils::CheckNEONFMA);
|
|
}
|
|
static void f32_igemm_4x8s4__neonfma(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8s4__neonfma,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/4,
|
|
benchmark::utils::CheckNEONFMA);
|
|
}
|
|
static void f32_igemm_6x8s4__neonfma(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8s4__neonfma,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/4,
|
|
benchmark::utils::CheckNEONFMA);
|
|
}
|
|
static void f32_igemm_8x8s4__neonfma(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_8x8s4__neonfma,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/8, /*nr=*/8, /*kr=*/1, /*sr=*/4,
|
|
benchmark::utils::CheckNEONFMA);
|
|
}
|
|
|
|
BENCHMARK_CONV(f32_igemm_1x8__neon_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_4x2__neon_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x2__neon_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_4x4__neon_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_4x8__neon_lane_ld128)
|
|
BENCHMARK_CONV(f32_igemm_4x8__neon_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x8__neon_lane_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x8__neon_lane_ld128)
|
|
BENCHMARK_CONV(f32_igemm_1x8__neon_dup_ld64)
|
|
BENCHMARK_CONV(f32_igemm_4x8__neon_dup_ld128)
|
|
BENCHMARK_CONV(f32_igemm_4x8__neon_dup_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x8__neon_dup_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x8__neon_dup_ld128)
|
|
BENCHMARK_CONV(f32_igemm_1x8__neonfma_dup_ld64)
|
|
BENCHMARK_CONV(f32_igemm_4x8__neonfma_dup_ld128)
|
|
BENCHMARK_CONV(f32_igemm_4x8__neonfma_dup_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x8__neonfma_dup_ld64)
|
|
BENCHMARK_CONV(f32_igemm_6x8__neonfma_dup_ld128)
|
|
|
|
BENCHMARK_CONV(f32_igemm_1x8s4__neon)
|
|
BENCHMARK_CONV(f32_igemm_4x8s4__neon)
|
|
BENCHMARK_CONV(f32_igemm_6x8s4__neon)
|
|
BENCHMARK_CONV(f32_igemm_8x8s4__neon)
|
|
BENCHMARK_CONV(f32_igemm_1x8s4__neonfma)
|
|
BENCHMARK_CONV(f32_igemm_4x8s4__neonfma)
|
|
BENCHMARK_CONV(f32_igemm_6x8s4__neonfma)
|
|
BENCHMARK_CONV(f32_igemm_8x8s4__neonfma)
|
|
#endif // XNN_ARCH_ARM || XNN_ARCH_ARM64
|
|
|
|
#if XNN_ENABLE_AVX512F && (XNN_ARCH_X86 || XNN_ARCH_X86_64)
|
|
static void f32_igemm_1x16__avx512f_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x16__avx512f_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX512F);
|
|
}
|
|
static void f32_igemm_4x16__avx512f_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x16__avx512f_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX512F);
|
|
}
|
|
static void f32_igemm_5x16__avx512f_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x16__avx512f_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX512F);
|
|
}
|
|
static void f32_igemm_6x16__avx512f_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x16__avx512f_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX512F);
|
|
}
|
|
static void f32_igemm_7x16__avx512f_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_7x16__avx512f_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/7, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX512F);
|
|
}
|
|
static void f32_igemm_8x16__avx512f_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_8x16__avx512f_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/8, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX512F);
|
|
}
|
|
BENCHMARK_CONV(f32_igemm_1x16__avx512f_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_4x16__avx512f_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_5x16__avx512f_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_6x16__avx512f_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_7x16__avx512f_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_8x16__avx512f_broadcast)
|
|
#endif // XNN_ENABLE_AVX512F && (XNN_ARCH_X86 || XNN_ARCH_X86_64)
|
|
|
|
#if XNN_ARCH_X86 || XNN_ARCH_X86_64
|
|
static void f32_igemm_1x8__sse_load1(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8__sse_load1,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_3x8__sse_load1(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_3x8__sse_load1,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/3, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_4x8__sse_load1(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__sse_load1,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_5x8__sse_load1(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8__sse_load1,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__sse_load1(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__sse_load1,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_1x8__sse_dup(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8__sse_dup,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_3x8__sse_dup(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_3x8__sse_dup,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/3, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_4x8__sse_dup(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__sse_dup,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_5x8__sse_dup(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8__sse_dup,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_6x8__sse_dup(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__sse_dup,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_1x8s4__sse(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8s4__sse,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
static void f32_igemm_3x8s4__sse(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_3x8s4__sse,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/3, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
static void f32_igemm_4x8s4__sse(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8s4__sse,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
static void f32_igemm_5x8s4__sse(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8s4__sse,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
static void f32_igemm_6x8s4__sse(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8s4__sse,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
static void f32_igemm_1x8__avx_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8__avx_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX);
|
|
}
|
|
static void f32_igemm_4x8__avx_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__avx_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX);
|
|
}
|
|
static void f32_igemm_5x8__avx_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8__avx_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX);
|
|
}
|
|
static void f32_igemm_6x8__avx_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__avx_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX);
|
|
}
|
|
static void f32_igemm_7x8__avx_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_7x8__avx_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/7, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckAVX);
|
|
}
|
|
|
|
static void f32_igemm_1x8__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f32_igemm_4x8__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f32_igemm_5x8__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f32_igemm_6x8__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f32_igemm_7x8__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_7x8__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/7, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f32_igemm_8x8__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_8x8__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/8, /*nr=*/8, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
|
|
static void f32_igemm_1x16__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x16__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f32_igemm_3x16__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_3x16__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/3, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f32_igemm_4x16__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x16__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f32_igemm_5x16__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x16__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
|
|
static void f32_igemm_5x16__fma3_broadcast_prfm(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x16__fma3_broadcast_prfm,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
static void f32_igemm_6x16__fma3_broadcast(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x16__fma3_broadcast,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
|
|
static void f32_igemm_6x16__fma3_broadcast_prfm(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x16__fma3_broadcast_prfm,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/16, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckFMA3);
|
|
}
|
|
|
|
BENCHMARK_CONV(f32_igemm_1x8__sse_load1)
|
|
BENCHMARK_CONV(f32_igemm_3x8__sse_load1)
|
|
BENCHMARK_CONV(f32_igemm_4x8__sse_load1)
|
|
BENCHMARK_CONV(f32_igemm_5x8__sse_load1)
|
|
BENCHMARK_CONV(f32_igemm_6x8__sse_load1)
|
|
BENCHMARK_CONV(f32_igemm_1x8__sse_dup)
|
|
BENCHMARK_CONV(f32_igemm_3x8__sse_dup)
|
|
BENCHMARK_CONV(f32_igemm_4x8__sse_dup)
|
|
BENCHMARK_CONV(f32_igemm_5x8__sse_dup)
|
|
BENCHMARK_CONV(f32_igemm_6x8__sse_dup)
|
|
BENCHMARK_CONV(f32_igemm_1x8s4__sse)
|
|
BENCHMARK_CONV(f32_igemm_3x8s4__sse)
|
|
BENCHMARK_CONV(f32_igemm_4x8s4__sse)
|
|
BENCHMARK_CONV(f32_igemm_5x8s4__sse)
|
|
BENCHMARK_CONV(f32_igemm_6x8s4__sse)
|
|
BENCHMARK_CONV(f32_igemm_1x8__avx_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_4x8__avx_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_5x8__avx_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_6x8__avx_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_7x8__avx_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_1x8__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_4x8__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_5x8__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_6x8__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_7x8__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_8x8__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_1x16__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_3x16__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_4x16__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_5x16__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_6x16__fma3_broadcast)
|
|
BENCHMARK_CONV(f32_igemm_5x16__fma3_broadcast_prfm)
|
|
BENCHMARK_CONV(f32_igemm_6x16__fma3_broadcast_prfm)
|
|
#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64
|
|
|
|
#if XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
|
|
static void f32_igemm_3x8__wasmsimd_arm_loadsplat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_3x8__wasmsimd_arm_loadsplat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/3, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_4x8__wasmsimd_arm_loadsplat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__wasmsimd_arm_loadsplat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_5x8__wasmsimd_arm_loadsplat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8__wasmsimd_arm_loadsplat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_6x8__wasmsimd_arm_loadsplat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__wasmsimd_arm_loadsplat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_1x8__wasmsimd_x86_loadsplat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8__wasmsimd_x86_loadsplat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
static void f32_igemm_3x8__wasmsimd_x86_loadsplat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_3x8__wasmsimd_x86_loadsplat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/3, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_4x8__wasmsimd_x86_loadsplat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__wasmsimd_x86_loadsplat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_5x8__wasmsimd_x86_loadsplat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8__wasmsimd_x86_loadsplat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_6x8__wasmsimd_x86_loadsplat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__wasmsimd_x86_loadsplat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_3x8__wasmsimd_arm_splat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_3x8__wasmsimd_arm_splat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/3, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_4x8__wasmsimd_arm_splat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__wasmsimd_arm_splat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_5x8__wasmsimd_arm_splat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8__wasmsimd_arm_splat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_6x8__wasmsimd_arm_splat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__wasmsimd_arm_splat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_1x8__wasmsimd_x86_splat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8__wasmsimd_x86_splat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_3x8__wasmsimd_x86_splat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_3x8__wasmsimd_x86_splat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/3, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_4x8__wasmsimd_x86_splat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8__wasmsimd_x86_splat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_5x8__wasmsimd_x86_splat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8__wasmsimd_x86_splat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_6x8__wasmsimd_x86_splat(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8__wasmsimd_x86_splat,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_3x8s4__wasmsimd_arm(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_3x8s4__wasmsimd_arm,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/3, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
|
|
static void f32_igemm_4x8s4__wasmsimd_arm(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8s4__wasmsimd_arm,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
|
|
static void f32_igemm_5x8s4__wasmsimd_arm(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8s4__wasmsimd_arm,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
|
|
static void f32_igemm_6x8s4__wasmsimd_arm(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8s4__wasmsimd_arm,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
|
|
static void f32_igemm_1x8s4__wasmsimd_x86(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x8s4__wasmsimd_x86,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
|
|
static void f32_igemm_3x8s4__wasmsimd_x86(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_3x8s4__wasmsimd_x86,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/3, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
|
|
static void f32_igemm_4x8s4__wasmsimd_x86(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x8s4__wasmsimd_x86,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
|
|
static void f32_igemm_5x8s4__wasmsimd_x86(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_5x8s4__wasmsimd_x86,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/5, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
|
|
static void f32_igemm_6x8s4__wasmsimd_x86(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_6x8s4__wasmsimd_x86,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/6, /*nr=*/8, /*kr=*/1, /*sr=*/4);
|
|
}
|
|
|
|
BENCHMARK_CONV(f32_igemm_3x8__wasmsimd_arm_loadsplat)
|
|
BENCHMARK_CONV(f32_igemm_4x8__wasmsimd_arm_loadsplat)
|
|
BENCHMARK_CONV(f32_igemm_5x8__wasmsimd_arm_loadsplat)
|
|
BENCHMARK_CONV(f32_igemm_6x8__wasmsimd_arm_loadsplat)
|
|
BENCHMARK_CONV(f32_igemm_1x8__wasmsimd_x86_loadsplat)
|
|
BENCHMARK_CONV(f32_igemm_3x8__wasmsimd_x86_loadsplat)
|
|
BENCHMARK_CONV(f32_igemm_4x8__wasmsimd_x86_loadsplat)
|
|
BENCHMARK_CONV(f32_igemm_5x8__wasmsimd_x86_loadsplat)
|
|
BENCHMARK_CONV(f32_igemm_6x8__wasmsimd_x86_loadsplat)
|
|
BENCHMARK_CONV(f32_igemm_3x8__wasmsimd_arm_splat)
|
|
BENCHMARK_CONV(f32_igemm_4x8__wasmsimd_arm_splat)
|
|
BENCHMARK_CONV(f32_igemm_5x8__wasmsimd_arm_splat)
|
|
BENCHMARK_CONV(f32_igemm_6x8__wasmsimd_arm_splat)
|
|
BENCHMARK_CONV(f32_igemm_1x8__wasmsimd_x86_splat)
|
|
BENCHMARK_CONV(f32_igemm_3x8__wasmsimd_x86_splat)
|
|
BENCHMARK_CONV(f32_igemm_4x8__wasmsimd_x86_splat)
|
|
BENCHMARK_CONV(f32_igemm_5x8__wasmsimd_x86_splat)
|
|
BENCHMARK_CONV(f32_igemm_6x8__wasmsimd_x86_splat)
|
|
BENCHMARK_CONV(f32_igemm_3x8s4__wasmsimd_arm)
|
|
BENCHMARK_CONV(f32_igemm_4x8s4__wasmsimd_arm)
|
|
BENCHMARK_CONV(f32_igemm_5x8s4__wasmsimd_arm)
|
|
BENCHMARK_CONV(f32_igemm_6x8s4__wasmsimd_arm)
|
|
BENCHMARK_CONV(f32_igemm_1x8s4__wasmsimd_x86)
|
|
BENCHMARK_CONV(f32_igemm_3x8s4__wasmsimd_x86)
|
|
BENCHMARK_CONV(f32_igemm_4x8s4__wasmsimd_x86)
|
|
BENCHMARK_CONV(f32_igemm_5x8s4__wasmsimd_x86)
|
|
BENCHMARK_CONV(f32_igemm_6x8s4__wasmsimd_x86)
|
|
#endif // XNN_ARCH_WASMSIMD || XNN_ARCH_WASMRELAXEDSIMD
|
|
|
|
static void f32_igemm_1x4__scalar(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_1x4__scalar,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/1, /*nr=*/4, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_2x4__scalar(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_2x4__scalar,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/2, /*nr=*/4, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
static void f32_igemm_4x4__scalar(benchmark::State& state, const char* net) {
|
|
f32_igemm(state,
|
|
xnn_f32_igemm_minmax_ukernel_4x4__scalar,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/4, /*nr=*/4, /*kr=*/1, /*sr=*/1);
|
|
}
|
|
|
|
BENCHMARK_CONV(f32_igemm_1x4__scalar)
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BENCHMARK_CONV(f32_igemm_2x4__scalar)
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BENCHMARK_CONV(f32_igemm_4x4__scalar)
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|
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#if XNN_ENABLE_RISCV_VECTOR && XNN_ARCH_RISCV
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static void f32_igemm_1x4v__rvv(benchmark::State& state, const char* net) {
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size_t vlenb = 0;
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asm volatile("csrr %0, vlenb" : "=r"(vlenb));
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// LMUL=4
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size_t nr = vlenb * 1.0;
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f32_igemm(state,
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xnn_f32_igemm_minmax_ukernel_1x4v__rvv,
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xnn_init_f32_minmax_scalar_params,
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|
/*mr=*/1, /*nr=*/nr, /*kr=*/1, /*sr=*/1,
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benchmark::utils::CheckRVV);
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|
}
|
|
|
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static void f32_igemm_7x4v__rvv(benchmark::State& state, const char* net) {
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size_t vlenb = 0;
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|
asm volatile("csrr %0, vlenb" : "=r"(vlenb));
|
|
// LMUL=4
|
|
size_t nr = vlenb * 1.0;
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|
f32_igemm(state,
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|
xnn_f32_igemm_minmax_ukernel_7x4v__rvv,
|
|
xnn_init_f32_minmax_scalar_params,
|
|
/*mr=*/7, /*nr=*/nr, /*kr=*/1, /*sr=*/1,
|
|
benchmark::utils::CheckRVV);
|
|
}
|
|
|
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BENCHMARK_CONV(f32_igemm_1x4v__rvv)
|
|
BENCHMARK_CONV(f32_igemm_7x4v__rvv)
|
|
#endif // XNN_ENABLE_RISCV_VECTOR && XNN_ARCH_RISCV
|
|
|
|
#ifndef XNNPACK_BENCHMARK_NO_MAIN
|
|
BENCHMARK_MAIN();
|
|
#endif
|